The present invention relates generally to the field of semiconductor devices. More particularly, the present invention relates to generation of a reference voltage in semiconductor devices.
Buffers are known in the art of circuit design for effectively isolating subcircuits within a system. For example, a buffer may be employed to prevent a later circuit from loading or putting excessive current drain on the signal source. In other cases, a source signal may be incapable of driving a later circuit having a large load, in which case a buffer may be employed to drive the later circuit.
Referring to FIG. 1, a conventional buffer circuit 100 employing operational amplifier 105 is generally shown. Operational amplifier 105 receives an input reference voltage (FVREF) 110 at its noninverting input and generates an output reference voltage (REF) 115. FVREF 110 can be any reference voltage, such as a bandgap reference voltage, for example. The output of operational amplifier 105 is tied to its inverting input to provide negative feedback loop 120. The arrangement of buffer circuit 100 is commonly referred to as a unity feedback amplifier. In operation, buffer circuit 100 is capable of driving a later circuit having a large load, such as capacitor CL 125, for example.
However, there are several problems associated with buffer circuit 100 as discussed herein with reference to FIG. 2. FIG. 2 generally shows a graph 200 depicting signal 210 representative of FVREF 110 and signal 215 representative of REF 115. Vertical axis 225 of graph 200 defines the voltage level of signals 210 and 215, while horizontal axis of graph 200 defines the time. As shown in graph 200, signal 215 (corresponding to REF 115) generated by operational amplifier 105 shows a significant delay in responding to the rapidly rising signal 210 (corresponding to FVREF 110). Thus, signal 215 (REF 115) does not closely follow a fast transition of signal 210 (FVREF 110).
Furthermore, signal 215 (REF 115) typically exhibits oscillations as shown in graph 200 due to negative feedback loop 120 of operational amplifier 105, especially if the operational amplifier has two or more stages and particularly when signal 215 (REF 115) is utilized to drive a large load. As a result, buffer circuit 100 tends to produce REF 115 having a slow and unstable response represented by signal 215 in graph 200. Accordingly, there exists a strong need in the art to overcome deficiencies of conventional buffer circuits, such as those described above, and to provide fast, stable, and accurate output reference voltages.
The present invention addresses and resolves the need in the art for generating a fast, stable and accurate reference voltage for driving a large load. According to one exemplary embodiment, a buffer circuit is configured to receive a supply voltage and an input reference voltage, the buffer circuit has a first FET operating in saturation region where the source of the first FET is coupled to the output reference voltage. The first FET can be configured, for example, as an open-loop voltage follower and, by way of example, a first resistor can be used to couple the source of the first FET to the output reference voltage.
The exemplary embodiment also comprises a tracking circuit connected to the buffer circuit. The tracking circuit comprises a second FET also operating in saturation region where the drain of the second FET is coupled to the output reference voltage. Both the first and second FETs can be, for example, depletion mode transistors. In one embodiment, the gate of the first FET is coupled to the input reference voltage, the drain of the first FET is coupled to the supply voltage and the source of the first FET is coupled to the output reference voltage through a first resistor. In one embodiment, the gate of the second FET is coupled to the output reference voltage through a voltage divider, the source of the second FET is coupled to ground through, for example, a second resistor; and the drain of the second FET is coupled to the output reference voltage. Other features and advantages of the present invention will become more readily apparent to those of ordinary skill in the art after reviewing the following detailed description and accompanying drawings.